A 4-9 GHz Reconfigurable Differential Power Combiner/Splitter in 65nm CMOS-Reference-Cited by-同舟云学术

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A 4-9 GHz Reconfigurable Differential Power Combiner/Splitter in 65nm CMOS

Published:2022-08-29 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
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Author:

Duan Haipeng¹,Wang Dongming¹,Chen Qin¹,Li Lianming¹,Wu Xu¹

Affiliation:

1. Southeast University, Purple Mountain Laboratories,National Mobile Communications Research Laboratory,Nanjing,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9882303/9882341/09882435.pdf?arnumber=9882435

Reference3 articles.

1. A DC to 43-GHz SPST Switch with Minimum 50-dB Isolation and +19.6-dBm Large-Signal Power Handling in 45-nm SOI-CMOS

2. 60-GHz 64- and 256-Elements Wafer-Scale Phased-Array Transmitters Using Full-Reticle and Subreticle Stitching Techniques

3. A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS

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