Synchronization analysis for Asynchronous k-valued logical Networks-Reference-Cited by-同舟云学术

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Synchronization analysis for Asynchronous k-valued logical Networks

Published:2022-02 Issue: Volume: Page:
ISSN:
Container-title:2022 International Symposium on Control Engineering and Robotics (ISCER)
language:
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Author:

Deng Yunyun¹,Liang Yi²,Xu Qingmin¹

Affiliation:

1. School of Network Security and Information Technology, Yili Normal University,Yining,China

2. School of Network Security and Information Technology, Yili Normal University,Key Laboratory of Micro-Nano Electronic Sensing Technology and Bionic Devices,Yining,China

Funder

National Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9894434/9894435/09894477.pdf?arnumber=9894477

Reference22 articles.

1. Pinning control design for robust output tracking of k -valued logical networks

2. Partial stability and stabilization of multi-valued logical networks

3. Stability and stabilization of multivalued logical networks

4. General synchronization of multi-valued logical networks;yang;Proceedings of the 31st Chinese Control Conference,0

5. SYNCHRONIZATION ANALYSIS FOR MULTIVALUED LOGICAL NETWORKS

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Synchronizations for K-Valued Logical Networks Under the State-Circulated Control;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-05

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