Digital architecture of the new ATLAS pixel chip FE-I4-Reference-Cited by-同舟云学术

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Digital architecture of the new ATLAS pixel chip FE-I4

Published:2009-10 Issue: Volume: Page:
ISSN:
Container-title:2009 IEEE Nuclear Science Symposium Conference Record (NSS/MIC)
language:
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Author:

Hemperek T.,Arutinov D.,Barbero M.,Beccherle R.,Darbo G.,Dube S.,Elledge D.,Fougeron D.,Garcia-Sciveres M.,Gnani D.,Gromov V.,Karagounis M.,Kluit R.,Kruth A.,Mekkaoui A.,Menouni M.,Schipper J.D.,Wermes N.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5384532/5401554/05402304.pdf?arnumber=5402304

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Hybrid pixel readout integrated circuits;Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment;2023-12

2. Towards GaAs thin-film tracking detectors;Journal of Instrumentation;2021-09-01

3. A review of advances in pixel detectors for experiments with high rate and radiation;Reports on Progress in Physics;2018-05-29

4. Production and integration of the ATLAS Insertable B-Layer;Journal of Instrumentation;2018-05-16

5. A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC;Journal of Instrumentation;2016-12-19

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