Digital Calibration of Capacitor Mismatch in Sigma-Delta Modulators
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/8919/5739679/05641627.pdf?arnumber=5641627
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 4th Order CIFB High Dynamic Range Sigma-Delta Modulator with Multi-level Quantizer and Intrinsically Linear Capacitive DACs;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. A 350-MS/s Continuous-Time Delta–Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2015-09
3. Digital Adaptive Calibration of Data Converters Using Independent Component Analysis;Sampling Theory, a Renaissance;2015
4. High-throughput impedance spectroscopy biosensor array chip;Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences;2014-03-28
5. A 15-MHz Bandwidth 1-0 MASH $\Sigma \Delta $ ADC With Nonlinear Memory Error Calibration Achieving 85-dBc SFDR;IEEE Journal of Solid-State Circuits;2014-03
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