A −70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS

Author:

Miyashita Daisuke,Agawa Kenichi,Kajihara Hirotsugu,Sami Kenichi,Iwanaga Masaomi,Ogasawara Yosuke,Ito Tomohiko,Kurose Daisuke,Koide Naotaka,Hashimoto Toru,Sakurai Hiroki,Yamaji Takafumi,Kurihara Takashi,Sato Kazumi,Seto Ichiro,Yoshida Hiroshi,Fujimoto Ryuichi,Unekawa Yasuo

Publisher

IEEE

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 0.34 mm2 1 Gb/s Non-Coherent UWB Receiver Architecture With Pulse Enhancement and Double PLL Clock/Data Packet Recovery;IEEE Transactions on Circuits and Systems I: Regular Papers;2019-07

2. A 7.6 mW 2 Gb/s Proximity Transmitter for Smartphone-Mirrored Display Applications;JSTS:Journal of Semiconductor Technology and Science;2016-08-30

3. A 12.5Gbps CDR with Differential to Common Converting Edge Detector for the Wired and Wireless Serial Link;IEICE Transactions on Electronics;2016

4. Analog and Digital Collaborative Design Techniques for Wireless SoCs;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2016

5. A 24 mW 5.7 Gbps Dual Frequency Conversion Demodulator for Impulse Radio with the First Sidelobe;IEICE Transactions on Electronics;2016

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