Semantics of RTL and Validation of Synthesized RTL Designs Using Formal Verification in Reconfigurable Computing Systems
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/9677/30561/01409923.pdf?arnumber=1409923
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Comparing Process Behaviors with Finite Chu Spaces;IEICE Transactions on Information and Systems;2011
2. Automatic generation of Chu space model expressions for verification;2008 51st Midwest Symposium on Circuits and Systems;2008-08
3. A Provable Algorithm for Reconfiguration in Embedded Reconfigurable Computing;29th Annual IEEE/NASA Software Engineering Workshop
4. Formalization of Data Flow Computing and a Coinductive Approach to Verifying Flowware Synthesis;Lecture Notes in Computer Science
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