CASPER: Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures-Reference-Cited by-同舟云学术

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CASPER: Concurrent hardware-software co-synthesis of hard real-time aperiodic and periodic specifications of embedded system architectures

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Container-title:Proceedings Design, Automation and Test in Europe
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Author:

Dave B.P.,Jha N.K.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx4/5270/14300/00655845.pdf?arnumber=655845

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Optimal Assignment of Real-Time Systems into Multi-context Dynamically Reconfigurable Processors;2009 15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications;2009-08

2. Hardware-software co-synthesis of hard real-time systems with reconfigurable FPGAs;Computers & Electrical Engineering;2004-10

3. Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform;Proceedings of the ninth international symposium on Hardware/software codesign - CODES '01;2001

4. COFTA: hardware-software co-synthesis of heterogeneous distributed embedded systems for low overhead fault tolerance;IEEE Transactions on Computers;1999-04

5. Codesign of embedded systems: status and trends;IEEE Design & Test of Computers;1998

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