A scalable front-end architecture for fast instruction delivery

Author:

Reinman G.,Anstin T.,Calder B.

Publisher

IEEE Comput. Soc. Press

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Alternate Path μ-op Cache Prefetching;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. AVM-BTB: Adaptive and Virtualized Multi-level Branch Target Buffer;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

3. Protean: Resource-efficient Instruction Prefetching;Proceedings of the International Symposium on Memory Systems;2023-10-02

4. A Storage-Effective BTB Organization for Servers;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02

5. Adaptive prefetching using global history buffer in multicore processors;The Journal of Supercomputing;2014-01-17

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