Digital Implementation of Level-Shifted Pulse Width Modulation for Multilevel Converters
Author:
Affiliation:
1. Gaziantep University,Dept. of Electrical and Electronics Engineering,Gaziantep,Turkey
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9799780/9799803/09800067.pdf?arnumber=9800067
Reference19 articles.
1. High-Level Language Tools for Reconfigurable Computing
2. PWM techniques for an asymmetric multilevel binary inverter: an FPGA‐based implementation
3. FPGA-Based High-Definition SPWM Generation With Harmonic Mitigation Property for Voltage Source Inverter Applications
4. FPGA Implementation of PS-PWM for Single-Phase Thirteen-Level Cascaded H-Bridge Multilevel Inverters
5. Overview and experimental analysis of MC SPWM techniques for single-phase five level cascaded H-bridge FPGA controller-based
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1. FPGA implementation of carrier-based PWM techniques for single-phase matrix converters;AEU - International Journal of Electronics and Communications;2023-12
2. Trapezoidal reference-based single carrier pulse width modulation method for multilevel converters with novel FPGA implementation;Computers and Electrical Engineering;2023-04
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