RLP: Power Management Based on a Latency-Aware Roofline Model
Author:
Affiliation:
1. RWTH Aachen University,IT Center,Aachen,Germany
Funder
Deutsche Forschungsgemeinschaft
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10177277/10177383/10177463.pdf?arnumber=10177463
Reference25 articles.
1. Beyond the Roofline: Cache-Aware Power and Energy-Efficiency Modeling for Multi-Cores
2. Exploring performance and power properties of modern multi-core chips via simple machine models
3. Roofline-aware DVFS for GPUs
4. Exploring GPU performance, power and energy-efficiency bounds with Cache-aware Roofline Modeling
5. Power measurement techniques on standard compute nodes: A quantitative comparison
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