Risk Reduction Strategies for SiP Design and Manufacturing
Author:
Affiliation:
1. Quality and Reliability Engineering,Amazon
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10012686/10013085/10013150.pdf?arnumber=10013150
Reference14 articles.
1. Molding Flow Modeling and Experimental Study on Void Control for Flip Chip Package Panel Molding with Molded Underfill Technology;tamil;International Symposium on Microelectronics,0
2. Transfer Molding Simulation to Predict Filling Flaws and Optmize Package Design;rovitto;22nd European Microelectronics and Packaging Conference & Exhibition,0
3. Influence of temperature, humidity, and defect location on delamination in plastic IC packages
4. Survey on delamination of IC packages in electronic products
5. Interfacial Delamination Mechanisms during Soldering Reflow with Moisture Preconditioning;fan;IEEE Transactions on Components and Packaging Technologies,2008
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