Optimized Design of Power Efficient FIR Filter Using Modified Booth Multiplier

Author:

Venkateshwarlu S. China1,Khadir Mohammad1,Vijay V.1,Pittala Chandra Shaker2,Vallabhuni Rajeev Ratna3

Affiliation:

1. Institute of Aeronautical Engineering,Department of Electronics and Communications Engineering,Hyderabad,India,500043

2. MLR Institute of Technology,Department of Electronics and Communications Engineering,Hyderabad,India,500043

3. Bayview Asset Management, LLC,Florida,USA

Publisher

IEEE

Reference16 articles.

1. POWER GRID FAULT PREDICTION METHOD BASED ON FEATURE SELECTION AND CLASSIFICATION ALGORITHM

2. DATA PUBLICATION BASED ON DIFFERENTIAL PRIVACY IN V2G NETWORK

3. System and Method to Improve Performance of Amplifiers Using Bias Current;vijay;The Patent Office Journal No 43/2019 India International classification C12Q1/6869 Application No 201941042648 A,0

4. System to Obtain Finite Gain and Noise of an Electrocardiogram Amplifier;vijay;The Patent Office Journal No 43/2019 India International classification H03F3/38 Application No 201941042674 A,0

5. System for Minimizing Crosstalk Effects of Shells and Designing Multiwalled Carbon Nanotube Models;vijay;The Patent Office Journal No 43/2019 India International classification B82Y10/00 Application No 201941042460 A,0

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design of Efficient Booth Multiplier based Polyphase FIR Filters;2023 Second International Conference on Augmented Intelligence and Sustainable Systems (ICAISS);2023-08-23

2. Design and performance analysis of low power and energy-efficient vedic multipliers;International Journal of System Assurance Engineering and Management;2023-04-29

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