An Implementation Method Using Cut-Off Bits for Restricted Boltzmann Machines Without Random Number Generators
Author:
Affiliation:
1. Graduate School of Life Science and Systems Engineering, Kyushu Institute of Technology, Wakamatsu-ku, Kitakyushu, Fukuoka, Japan
Funder
UENO SEIKI Next Generation Frontier Technology Collaboration Laboratory
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/6287639/9668973/09758768.pdf?arnumber=9758768
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4. A highly scalable Restricted Boltzmann Machine FPGA implementation
5. Reducing the Dimensionality of Data with Neural Networks
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