Improvement of Thermal Characteristics and On-Current in Vertically Stacked Nanosheet FET by Parasitic Channel Height Engineering-Reference-Cited by-同舟云学术

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Improvement of Thermal Characteristics and On-Current in Vertically Stacked Nanosheet FET by Parasitic Channel Height Engineering

Published:2024 Issue: Volume:12 Page:105878-105886
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Song Young Suh¹^ORCID,Kim Hyunwoo²^ORCID,Hyun Kim Jang³

Affiliation:

1. Department of Electrical and Computer Engineering, Seoul National University, Seoul, Republic of Korea

2. Department of Electrical and Electronics Engineering, Konkuk University, Seoul, Republic of Korea

3. Department of Electrical and Computer Engineering, Ajou University, Suwon, Republic of Korea

Funder

National Research Foundation of Korea (NRF) grant

Korean Government

Technology Innovation Program [Development of eGaN HEMT Device Advancement Technology Using GaN Standard Modeling Technology (ASM)]

Ministry of Trade, Industry and Energy

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/6287639/10380310/10614596.pdf?arnumber=10614596

Reference37 articles.

1. Impact of Technology Scaling on the Performance of All-Time-On Single-Ended CMOS Logic

2. Implications of voltage and dimension scaling on CMOS testing: the multidimensional testing paradigm

3. Enhancement of Thermal Characteristics and On-Current in GAA MOSFET by Utilizing Al₂O₃-Based Dual-κ Spacer Structure

4. Modeling of Short-Channel Effect on Multi-Gate MOSFETs for Circuit Simulation

5. NBTI Mitigation by Optimized HKMG Thermal Processing in a FinFET Technology

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