Design and Investigation of InGaAs/InP/InAlAs MOSFET With Optimized Switching Efficiency-Reference-Cited by-同舟云学术

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Design and Investigation of InGaAs/InP/InAlAs MOSFET With Optimized Switching Efficiency

Published:2024 Issue: Volume:12 Page:70045-70052
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Sahu Swastik Kumar¹^ORCID,Mazumdar Kaushik¹,Kitmo ²,Jember Yosef Berhan³^ORCID,Das Sima⁴

Affiliation:

1. Department of Electronics Engineering, Indian Institute of Technology (IIT) Dhanbad (ISM), Dhanbad, India

2. Department of Renewable Energy, National Advanced School of Engineering of Maroua, University of Maroua, Maroua, Cameroon

3. Bahir Dar Institute of Technology, Bahir Dar University, Bahir Dar, Ethiopia

4. Bengal College of Engineering and Technology, Durgapur, West Bengal, India

Funder

Government of India funded

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/6287639/10380310/10531709.pdf?arnumber=10531709

Reference20 articles.

1. Nanometre-scale electronics with III–V compound semiconductors

2. Heterojunction Diode Shielded SiC Split-Gate Trench MOSFET With Optimized Reverse Recovery Characteristic and Low Switching Loss

3. Drain current versus drain voltage characteristics for an analytical Al0.25Ga0.75N/GaN superlattice MOSFET

4. Projected Performance of InGaAs/GaAs Quantum Dot Solar Cells: Effects of Cap and Passivation Layers

5. Evolution of Transistors: Humble Beginnings to the Ubiquitous Present

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