800 MB/s DDR NAND Flash Memory Multi-Chip Package With Source-Synchronous Interface for Point-to-Point Ring Topology-Reference-Cited by-同舟云学术

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800 MB/s DDR NAND Flash Memory Multi-Chip Package With Source-Synchronous Interface for Point-to-Point Ring Topology

Published:2013 Issue: Volume:1 Page:811-816
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Gillingham Peter,Chinn David,Choi Eric,Kim Jin-Ki,Macdonald Don,Oh Hakjune,Pyeon Hong-Beom,Schuetz Roland

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Link

http://ieeexplore.ieee.org/iel7/6287639/6336544/06681893.pdf

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Exploiting Data Similarity to Improve SSD Read Performance;Applied Sciences;2023-12-06

2. P-BMS;ACM Transactions on Embedded Computing Systems;2017-10-10

3. Design for scalability in enterprise SSDs;Proceedings of the 23rd international conference on Parallel architectures and compilation;2014-08-24

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