A Sparse Neural Network-Based Power Adaptive DPD Design and Its Hardware Implementation-Reference-Cited by-同舟云学术

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A Sparse Neural Network-Based Power Adaptive DPD Design and Its Hardware Implementation

Published:2022 Issue: Volume:10 Page:114673-114682
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Tanio Masaaki¹^ORCID,Ishii Naoto¹^ORCID,Kamiya Norifumi¹^ORCID

Affiliation:

1. NEC Corporation, Kawasaki, Kanagawa, Japan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/9668973/09932585.pdf?arnumber=9932585

Reference26 articles.

1. Residual RNN Models With Pruning for Digital Predistortion of RF Power Amplifiers

2. Low Computational Complexity Digital Predistortion Based on Convolutional Neural Network for Wideband Power Amplifiers

3. Design and Implementation of a Neural Network Based Predistorter for Enhanced Mobile Broadband

4. Experimental Analysis and FPGA Implementation of the Real Valued Time Delay Neural Network Based Digital Predistortion

5. A Sparse-Bayesian Approach for the Design of Robust Digital Predistorters Under Power-Varying Operation

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A neural network-based DPD coefficient determination for PA linearization in 5G and beyond-5G mmWave systems;IEICE Electronics Express;2024-05-25

2. A Neural Network-Based DPD Coefficient Determination for PA Linearization in 5G and Beyond-5G mmWave Systems;IEICE ELECTRON EXPR;2024

3. Augmented Envelope Neural Networks on RF-SoC for Digital Self-Interference Cancellation;IEEE Access;2024

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