Fractional Dual-Tilt Control Scheme for Integrating Time Delay Processes: Studied on a Two-Tank Level System
Author:
Affiliation:
1. National Institute of Technology Silchar, Silchar, India
2. Electrical and Electronics Engineering, The University of the South Pacific, Suva, Fiji
3. National Institute of Technology Patna, Patna, India
Funder
Research Award Fund of The University of the South Pacific, Fiji
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/6287639/10380310/10384370.pdf?arnumber=10384370
Reference32 articles.
1. I–PD controller for integrating plus time‐delay processes
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3. All-PD control of pure Integrating Plus Time-Delay processes with gain and phase-margin specifications
4. Desired Characteristic Equation Based PID Controller Tuning for Lag-Dominating Processes With Real-Time Realization on Level Control System
5. A Robust Stability Region-Based Decentralized PI Controller for a Multivariable Liquid Level System
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