Modeling and Simulation of System Bus and Memory Collisions in Heterogeneous SoCs-Reference-Cited by-同舟云学术

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Modeling and Simulation of System Bus and Memory Collisions in Heterogeneous SoCs

Published:2022 Issue: Volume:10 Page:25901-25921
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Wang Jooho¹^ORCID,Gim Yungyu²,Park Sungkyung³^ORCID,Park Chester Sungchung¹^ORCID

Affiliation:

1. Department of Electrical and Electronics Engineering, Konkuk University, Seoul, South Korea

2. System LSI Business, Samsung Electronics, Inc., Hwaseong-si, Gyeonggi-do, South Korea

3. Department of Electronics Engineering, Pusan National University, Busan, South Korea

Funder

Samsung Research Funding and Incubation Center, Samsung Electronics

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Link

http://xplorestaging.ieee.org/ielx7/6287639/9668973/09721024.pdf?arnumber=9721024

Reference47 articles.

1. A Programmable Heterogeneous Microprocessor Based on Bit-Scalable In-Memory Computing

2. High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors

3. Block-Interlaced LDPC Decoders With Reduced Interconnect Complexity

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