Compact and Broadband ESD Protection I/O Pad Using Pad-Stacked Inductor
Author:
Affiliation:
1. Department of Electronic Engineering, Sogang University, Seoul, South Korea
2. Foundry Division, Samsung Electronics, Hwaseong, South Korea
Funder
Samsung Electronics
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/6287639/10005208/10021582.pdf?arnumber=10021582
Reference30 articles.
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3. Analysis and optimization of distributed ESD protection circuits for high-speed mixed-signal and RF applications;ito;Proc Electr Overstress/Electrostatic Discharge Symp,2001
4. A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET
5. A compact broadband ESD protection circuit using multi‐layer helical inductor
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