FEOL Monolithic Co-Integration of FeFET and CMOS on 8-Inch Wafer Using Laser Spike Annealing With Implementation of an FeFET Inverter-Reference-Cited by-同舟云学术

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FEOL Monolithic Co-Integration of FeFET and CMOS on 8-Inch Wafer Using Laser Spike Annealing With Implementation of an FeFET Inverter

Published:2024 Issue: Volume:12 Page:110273-110282
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Kang Bohyeon¹^ORCID,An Jehyun¹^ORCID,Park Jongseo¹^ORCID,Hong Giryun¹^ORCID,Ham Beomjoo¹,Pyo Jaeseong¹,Ahn Sung-Min¹^ORCID,Baek Rock-Hyun¹^ORCID

Affiliation:

1. Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Republic of Korea

Funder

National Research Foundation of Korea (NRF) Grant

Korean Government [Ministry of Science and ICT (MSIT)]

Technology Innovation Program

Ministry of Trade, Industry and Energy (MOTIE), South Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/6287639/10380310/10630779.pdf?arnumber=10630779

Reference23 articles.

1. Celebrating 75 years of the transistor A look at the evolution of Moore’s Law innovation

2. Principles and Applications of Ferroelectrics and Related Materials

3. Progress and future prospects of negative capacitance electronics: A materials perspective

4. Use of Negative Capacitance to Provide Voltage Amplification for Low Power Nanoscale Devices

5. Negative capacitance in a ferroelectric capacitor

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