Data Path Nonlinearity Estimation for 200 Gbps PAM4 Serdes Receivers
Author:
Affiliation:
1. Intel Corporation, Bengaluru, India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx8/6287639/10380310/10552756.pdf?arnumber=10552756
Reference11 articles.
1. A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels
2. System-driven circuit design for ADC-based wireline data links;Zheng,2018
3. Statistical Modeling of Non-Linearity in Decision Feedback Equalizer-Based Mixed-Signal Receivers
4. A Novel Decision Feedback Equalization Structure for Nonlinear High-Speed Links
5. Nonlinear decision feedback estimation for multicarrier power line communication
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