Low Voltage and Low Power Front Panel Design for 12 Lead ECG
Author:
Affiliation:
1. Department of ECE, Koneru Lakshmaiah Education Foundation, Vaddeswaram, Guntur, Andhra Pradesh, India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/6287639/9668973/09801836.pdf?arnumber=9801836
Reference22 articles.
1. Design of Schmitt Trigger Logic Gates Using DTMOS for Enhanced Electromagnetic Immunity of Subthreshold Circuits
2. 0.8V ultralow-power CMOS analog multiplexer for remote biological and chemical signal processing
3. Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI
4. DTMOS: its derivatives and variations, and their potential applications
5. Design considerations on low-voltage low-power data converters
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