The Design of Optimized RISC Processor for Edge Artificial Intelligence Based on Custom Instruction Set Extension
Author:
Affiliation:
1. Department of Electronic Engineering, Seoul National University of Science and Technology, Seoul, South Korea
Funder
Institute for Information and Communications Technology Planning and Evaluation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/6287639/10005208/10124773.pdf?arnumber=10124773
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1. Case Study: Optimization Methods With TVM Hybrid-OP on RISC-V Packed SIMD;IEEE Access;2024
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