A Hardware-Accelerated Approach to Chaotic Image Encryption: LTB Map and FPGA Implementation-Reference-Cited by-同舟云学术

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A Hardware-Accelerated Approach to Chaotic Image Encryption: LTB Map and FPGA Implementation

Published:2024 Issue: Volume:12 Page:103921-103940
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Yamni Mohamed¹^ORCID,Daoui Achraf²^ORCID,Pławiak Paweł³^ORCID,Alfarraj Osama⁴^ORCID,El-Latif Ahmed A. Abd⁵^ORCID

Affiliation:

1. Dhar El Mahrez Faculty of Science, University of Sidi Mohamed Ben Abdellah, Fes, Morocco

2. National School of Applied Sciences, University of Sidi Mohamed Ben Abdellah, Fes, Morocco

3. Department of Computer Science, Faculty of Computer Science and Telecommunications, Cracow University of Technology, Krakow, Poland

4. Computer Science Department, Community College, King Saud University, Riyadh, Saudi Arabia

5. Jadara University Research Center, Jadara University, Irbid, Jordan

Funder

Researchers Supporting Project, King Saud University, Riyadh, Saudi Arabia

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/6287639/10380310/10605783.pdf?arnumber=10605783

Reference61 articles.

1. A new combination chaotic system and its application in a new Bit-level image encryption scheme

2. A New Four-Dimensional Chaotic System and its Circuit Implementation

3. FPGA Implementation of a Chaotic Map with No Fixed Point

4. URUK 4D DISCRETE CHAOTIC MAP FOR SECURE COMMUNICATION APPLICATIONS

5. A Two-dimensional Mapping with a Strange Attractor

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1. Enhanced lightweight encryption algorithm based on chaotic systems;Physica Scripta;2024-09-12

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