CMOS-Driven VCSEL-Based Photonic Links: an Exploration of the Power-Sensitivity Trade-Off-Reference-Cited by-同舟云学术

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CMOS-Driven VCSEL-Based Photonic Links: an Exploration of the Power-Sensitivity Trade-Off

Published:2022 Issue: Volume:10 Page:89331-89345
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Abdelrahman Diaaeldin¹^ORCID,Liboiron-Ladouceur Odile²^ORCID,Cowan Glenn E. R.³^ORCID

Affiliation:

1. Electrical Engineering Department, Faculty of Engineering, Assiut University, Asyut, Egypt

2. Department of Electrical and Computer Engineering, McGill University, Montreal, Canada

3. Department of Electrical and Computer Engineering, Concordia University, Montreal, Canada

Funder

Natural Sciences and Engineering Research Council of Canada Strategic Partnership Grant Program

Gina Cody School of Engineering and Computer Science, Concordia University

Regroupement Stratégique en Microsystèmes du Québec

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/9668973/09862984.pdf?arnumber=9862984

Reference35 articles.

1. High-Speed, Low-Current-Density 850 nm VCSELs

2. A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS

3. A Differential Push-Pull Voltage Mode VCSEL Driver in 65-nm CMOS

4. A 3-GHz 32-dB CMOS limiting amplifier for SONET OC-48 receivers

5. Scaling Trends for Picojoule-per-Bit WDM Photonic Interconnects in CMOS SOI and FinFET Processes

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-11

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