HPSAP: A High-Performance and Synthesizable Asynchronous Pipeline With Quasi-2phase Conversion Method-Reference-Cited by-同舟云学术

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HPSAP: A High-Performance and Synthesizable Asynchronous Pipeline With Quasi-2phase Conversion Method

Published:2023 Issue: Volume:11 Page:119711-119721
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Tang Xiqin¹^ORCID,Wang Jingyu¹,Li Yang²,Hu Jinhua³,Xia Fei⁴^ORCID,Shang Delong¹

Affiliation:

1. Institute of Microelectronics, Chinese Academy of Sciences (IMECAS), Beijing, Chaoyang, China

2. University of Chinese Academy of Sciences (UCAS), Beijing, Shijingshan, China

3. Nanjing Institute of Intelligent Technology, Nanjing, Jiangning, China

4. Newcastle University, Newcastle upon Tyne, Tyne and Wear, U.K

Funder

National Key Research and Development Program of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/10005208/10292635.pdf?arnumber=10292635

Reference26 articles.

1. Relative Timing Latch Controller with Significant Improvement on Power, Performance, and Robustness

2. Click Elements: An Implementation Style for Data-Driven Compilation

3. Low-Latency Masking with Arbitrary Protection Order Based on Click Elements

4. A Design Flow for Click-Based Asynchronous Circuits Design With Conventional EDA Tools

5. MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines

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