Circuitry Approaches for Reducing of the Zero Level in Three-Stage CJFET Operational Amplifier-Reference-Cited by-同舟云学术

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Circuitry Approaches for Reducing of the Zero Level in Three-Stage CJFET Operational Amplifier

Published:2022-06-06 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Conference on Design & Test of Integrated Micro & Nano-Systems (DTS)
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Author:

Prokopenko Nikolay¹,Titov Alexey²,Bugakova Anna³,Chumakov Vladislav⁴

Affiliation:

1. Don State Technical University, IPPM RAS,Rostov-on-Don,Zelenograd,Russia

2. Southern Federal University,Rostov-on-Don,Russia

3. Student Member of IEEE Don State Technical University,Rostov-on-Don,Russia

4. Don State Technical University,Rostov-on-Don,Russia

Funder

Russian Science Foundation

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9809782/9809841/09809861.pdf?arnumber=9809861

Reference19 articles.

1. TMS320280x and TMS3202801x ADC Calibration;pate;Texas Instruments,2007

2. CJFET Op-Amp without Current Mirrors for Low Temperature Applications

3. Directly coupled operational amplifiers;anisimov;Energy,1979

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