Analysis and Implementation of Staggered Wire Bonding for LVDS Data and Large Power Transmission in CMOS Image Sensors-Reference-Cited by-同舟云学术

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Analysis and Implementation of Staggered Wire Bonding for LVDS Data and Large Power Transmission in CMOS Image Sensors

Published:2023-10-27 Issue: Volume: Page:
ISSN:
Container-title:2023 5th International Conference on Circuits and Systems (ICCS)
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Author:

Ding Bowen¹,Niu Zhiqiang²,Chen Zhikun²,Zhang Weizhe³,Zhang Bailin²,Yang Changhui²,Wu Nanjian¹,Liu Liyuan¹,Feng Peng¹

Affiliation:

1. State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences,Beijing,China

2. School of Physical Science and Technology, Ningbo University,Ningbo Zhejiang,China

3. School of Integrated Circuits, University of Chinese Academy of Sciences,Beijing,China

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10367210/10367213/10367380.pdf?arnumber=10367380

Reference9 articles.

1. A Global-Shutter CMOS Image Sensor With Readout Speed of 1-Tpixel/s Burst and 780-Mpixel/s Continuous

2. 7.1 A 4-tap 3.5 μm 1.2 Mpixel Indirect Time-of-Flight CMOS Image Sensor with Peak Current Mitigation and Multi-User Interference Cancellation

3. Assembly challenges related to fine pitch in-line and staggered bond pad devices

4. A 113.3-dB Dynamic Range 600 Frames/s SPAD X-Ray Detector With Seamless Global Shutter and Time-Encoded Extrapolation Counter

5. A 134×132 4-Tap CMOS Indirect Time-of-Flight Range Imager Using In-Pixel Memory Array With 10 Kfps High-Speed Mode and High Precision Mode

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