An E-Band Transformer-Based ×8 Frequency Multiplier With Enhanced Harmonic Rejection
Author:
Affiliation:
1. Division of Electronics and Electrical Engineering, Dongguk University, Seoul, Republic of Korea
Funder
Electronics and Telecommunications Research Institute (ETRI) through the Korean Government
Study on 3-D Communication Technology for Hyper-Connectivity
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Radiation
Link
http://xplorestaging.ieee.org/ielx7/22/10061518/09938391.pdf?arnumber=9938391
Reference39 articles.
1. Analysis and Design of High-Harmonic-Rejection Multi-Ratio mm-Wave Frequency Multipliers
2. Frequency doublers with 10.2/5.2 dBm peak power at 100/202 GHz in 45 nm SOI CMOS;liu;Proc IEEE Radio Freq Integr Circuits Symp (RFIC),2015
3. An 82–107.6-GHz Integer- $N$ ADPLL Employing a DCO With Split Transformer and Dual-Path Switched-Capacitor Ladder and a Clock-Skew-Sampling Delta–Sigma TDC
4. Design of 94-GHz Highly Efficient Frequency Octupler Using 47-GHz Current-Reusing Class-C Frequency Quadrupler
5. A 19.5% Efficiency 51–73-GHz High-Output Power Frequency Doubler in 65-nm CMOS
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2. A F-Band X4 Frequency Multiplier Chip with High Spectral Purity Using Vertically Stacked Marchand Baluns and TF-MSL;2024 IEEE/MTT-S International Microwave Symposium - IMS 2024;2024-06-16
3. A W-Band Transmitter for Automotive Radar Sensors in 28-nm FD-SOI CMOS;IEEE Transactions on Microwave Theory and Techniques;2023-10
4. A X4 Multiplier MMIC to E-Band Frequencies with High Spectral Purity in 50 nm mHEMT Technology;2023 18th European Microwave Integrated Circuits Conference (EuMIC);2023-09-18
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