Energy-Efficient Monolithic Three-Dimensional On-Chip Memory Architectures-Reference-Cited by-同舟云学术

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Energy-Efficient Monolithic Three-Dimensional On-Chip Memory Architectures

Published:2018-07 Issue:4 Volume:17 Page:620-633
ISSN:1536-125X
Container-title:IEEE Transactions on Nanotechnology
language:
Short-container-title:IEEE Trans. Nanotechnology

Author:

Yu Ye^ORCID,Jha Niraj K.^ORCID

Funder

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Science Applications

Link

https://ieeexplore.ieee.org/ielaam/7729/8408416/7990548-aam.pdf

Cited by 17 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. Thermal Heating in ReRAM Crossbar Arrays: Challenges and Solutions;IEEE Open Journal of Circuits and Systems;2024

3. A 118 GOPS/mm²3D eDRAM TensorCore Architecture for Large-scale Matrix Multiplication;2023 IEEE 30th International Conference on High Performance Computing, Data, and Analytics (HiPC);2023-12-18

4. AccelTran: A Sparsity-Aware Accelerator for Dynamic Inference With Transformers;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11

5. Effect of Al Concentration on Ferroelectric Properties in HfAlO_x‐Based Ferroelectric Tunnel Junction Devices for Neuroinspired Applications;Advanced Intelligent Systems;2023-05-18

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