Author:
Guz Zvika,Keidar Idit,Kolodny Avinoam,Weiser Uri
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Hardware and Architecture
Cited by
5 articles.
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1. References;Three-Dimensional Integrated Circuit Design;2017
2. Performance and Power Aware CMP Thread Allocation Modeling;High Performance Embedded Architectures and Compilers;2010
3. References;Three-dimensional Integrated Circuit Design;2009
4. Last Bank: Dealing with Address Reuse in Non-Uniform Cache Architecture for CMPs;Lecture Notes in Computer Science;2009
5. Shared Memory Networks On Chip Architecture;IFAC Proceedings Volumes;2009