Improving Reliability of Embedded RISC-V SoC for Low-cost Space Applications
Author:
Affiliation:
1. ECE, PES University,Bengaluru,India
2. U. R. Rao Satellite Centre ISRO,Bengaluru,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10127222/10127226/10127244.pdf?arnumber=10127244
Reference17 articles.
1. Selecting a Synthesizable RISC-V Processor Core for low-cost Hardware devices;agyemanh nana gookyi;2019 Journal of Information Processing Systems,0
2. Evaluating the performance efficiency of a softprocessor, variable-length, parallel-execution-unit architecture for FPGAs using the RISC-V ISA;matthews,2018
3. Fault Detection Methods: A Literature Survey;dubravko miljkovi?;2011 Proceedings of the 34th International Convention MIPRO,2011
4. Evaluation of Modified Collaborative Triple Module Redundancy Based on COTS Heterogeneous Processor
5. Leveraging the Openness and Modularity of RISC-V in Space
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