A K-band high gain, low noise figure LNA using 0.13 μm logic CMOS technology

Author:

Dang J.,Sakalas P.,Noculak A.,Hinz M.,Meinerzhagen B.

Publisher

IEEE

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 24GHz High Dynamic Range Low-Noise Amplifier Design Optimization Methodology and Circuit Configuration;Iranian Journal of Science and Technology, Transactions of Electrical Engineering;2021-07-28

2. Design and optimization of a CMOS IC novel RF tracking sensor;International Journal of Circuit Theory and Applications;2021-02-15

3. A 17.7-42.9-GHz Low Power Low Noise Amplifier with 83% Fractional Bandwidth for Radio Astronomical Receivers in 65-nm CMOS;2020 IEEE Asia-Pacific Microwave Conference (APMC);2020-12-08

4. A Two-Stage LNA Design for 28GHz Band Of 5G on 45nm CMOS;2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS);2020-08

5. Investigation of Speech-Planning Mechanism Based on Eye Movement;Studies on Speech Production;2018

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