A new computing architecture using Ising spin model implemented on FPGA for solving combinatorial optimization problems-Reference-Cited by-同舟云学术

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A new computing architecture using Ising spin model implemented on FPGA for solving combinatorial optimization problems

Published:2017-07 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE 17th International Conference on Nanotechnology (IEEE-NANO)
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Author:

Kihara Y.,Ito M.,Saito T.,Shiomura M.,Sakai S.,Shirakashi J.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8103843/8117249/08117327.pdf?arnumber=8117327

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Experimental Evaluation of Performance Improvement by Sparse Operation in Ising Spin Computing;2022 IEEE Nanotechnology Materials and Devices Conference (NMDC);2022-11-17

2. Quadratic Unconstrained Binary Optimization via Quantum-Inspired Annealing;Physical Review Applied;2022-09-07

3. Efficient Ground-state Searches by Scheduling Sparsity of Interactions of Physical Spin Dynamics for Ising Spin Computing;2022 IEEE International Conference on Manipulation, Manufacturing and Measurement on the Nanoscale (3M-NANO);2022-08-08

4. Distance-based clustering using QUBO formulations;Scientific Reports;2022-02-17

5. Hybridization of Spin Decision Logics for Ising Machine with Logic Circuits;2021 IEEE 21st International Conference on Nanotechnology (NANO);2021-07-28

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