High-Performance Chip Design With Parallel Architecture for Magnetic Field Imaging System-Reference-Cited by-同舟云学术

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High-Performance Chip Design With Parallel Architecture for Magnetic Field Imaging System

Published:2024 Issue: Volume:73 Page:1-13
ISSN:0018-9456
Container-title:IEEE Transactions on Instrumentation and Measurement
language:
Short-container-title:IEEE Trans. Instrum. Meas.

Author:

Lin Ming-Yi¹^ORCID,Hsieh Sheng-Hsien²^ORCID,Chen Ching-Han³^ORCID,Lin Chun-Hung⁴^ORCID

Affiliation:

1. Department of Computer Science and Engineering, Yuan Ze University, Taoyuan, Taiwan

2. Program of Artificial Intelligence and Mechatronics, National Pingtung University of Science and Technology, Pingtung, Taiwan

3. Department of Computer Science and Information Engineering, National Central University, Taoyuan, Taiwan

4. International Games System Company Ltd., New Taipei City, Taiwan

Funder

National Science and Technology Council, Taiwan

Special Fund of Yuan Ze University

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Instrumentation

Link

http://xplorestaging.ieee.org/ielx7/19/10367905/10322749.pdf?arnumber=10322749

Reference29 articles.

1. Flexible Array Probe With In-Plane Differential Multichannels for Inspection of Microdefects on Curved Surface

2. Flexible Probe With Array Tunneling Magnetoresistance Sensors for Curved Structure Inspection

3. Flexible ECT probe with front-end differential setting for inspection of curved CFRP structures

4. Eddy Current Probe With Three-Phase Excitation and Integrated Array Tunnel Magnetoresistance Sensors

5. Fastener Tilt Assessment Based on Magnetic Field Image Obtained With Array Tunnel Magnetoresistance Sensors

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