An Empirical Study of Performance Interference: Timing Violation Patterns and Impacts
Author:
Affiliation:
1. Washington University,St. Louis
Funder
NSF
ARO
Washington University in St. Louis
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10566868/10568032/10568068.pdf?arnumber=10568068
Reference83 articles.
1. Precise shared cache analysis using optimal interference placement
2. Worst case delay analysis for memory interference in multicore systems
3. Denial-of-Service Attacks on Shared Cache in Multicore: Analysis and Prevention
4. Modeling Contention Interference in Crossbar-based Systems via Sequence-Aware Pairing (SeAP)
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