A Highly-Scalable Area-Efficient ADC-Direct Neural Recording Front-End with Proportional-Integral Single-Bit Feedback
Author:
Affiliation:
1. York University,Department of Electrical Engineering and Computer Science,Toronto,Canada
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10388488/10388438/10388870.pdf?arnumber=10388870
Reference23 articles.
1. Activity-Adaptive Architectures for Energy-Efficient Scalable Neural Recording Microsystems: A Review of Current and Future Directions
2. Electronic Sleep Stage Classifiers: A Survey and VLSI Design Methodology
3. Sub- $\mu$ Vrms-Noise Sub- $\mu$ W/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging
4. A 32-Channel Time-Multiplexed Artifact-Aware Neural Recording System
5. A 0.67 $\mu$V-IIRN super-T$\Omega$-Z$_{IN}$ 17.5 $\mu$W/Ch Active Electrode With In-Channel Boosted CMRR for Distributed EEG Monitoring
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