Hierarchical Network-on-Chip for Embedded Many-Core Architectures
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5476379/5507539/05507546.pdf?arnumber=5507546
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Wavelength-Reused Hierarchical Optical Network on Chip Architecture for Manycore Processors;IEEE Transactions on Sustainable Computing;2019-04-01
2. Adaptive Algorithm based on Renyi’s Entropy for Task Mapping in a Hierarchical Wireless Network-on-Chip Architecture;Computación y Sistemas;2018-09-30
3. Genetic algorithm for task mapping in embedded systems on a hierarchical architecture based on wireless network on chip WiNoC;DYNA;2017-06-10
4. CAP Bench: a benchmark suite for performance and energy evaluation of low-power many-core processors;Concurrency and Computation: Practice and Experience;2016-06-17
5. A comparison between two optimisation alternatives for mapping in wireless network on chip;PROC INT C TOOLS ART;2016
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