Economical and Technical FPGA Design Analysis Based on Machine Learning-Reference-Cited by-同舟云学术

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Economical and Technical FPGA Design Analysis Based on Machine Learning

Published:2024-03-07 Issue: Volume: Page:22-25
ISSN:
Container-title:2024 Argentine Conference on Electronics (CAE)
language:
Short-container-title:

Author:

Guitián Anahí¹,Cayssials Ricardo¹

Affiliation:

1. Universidad Tecnológica Nacional – FRBB, Universidad Nacional del Sur - DIEC,Bahía Blanca,Argentina

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10487127/10487112/10487166.pdf?arnumber=10487166

Reference10 articles.

1. Parametric Cost and Schedule Modeling for Early Technology Development;Alexander;National Security Report, Johns Hopkins Applied Physics Laboratory,2018

2. Measuring the Gap Between FPGAs and ASICs

3. Area and delay trade-offs in the circuit and architecture design of FPGAs

4. Area-Efficient FPGA Implementations of the SHA-3 Finalists

5. Implementation and comparison of effective area efficient architectures for CSLA

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