Power Efficiency Top-Down ALU for Error Correction and Detection Circuit-Reference-Cited by-同舟云学术

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Power Efficiency Top-Down ALU for Error Correction and Detection Circuit

Published:2022-12-15 Issue: Volume: Page:
ISSN:
Container-title:2022 3rd International Conference on Communication, Computing and Industry 4.0 (C2I4)
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Author:

Senthilpari C.¹,Diwakar K.²,Deivasigamani ³,Velrajkumar P.⁴,Ayavoo Rajenthyran⁵

Affiliation:

1. Multimedia university, Jalan Multimedia,Faculty of Engineering,Cyberjaya,Malaysia,63100

2. Anand Institute of Technology,Department of ECE,Chennai,India

3. UCSI University,FETBE,Malaysia

4. CMRIT,Department of EEE,Bangaluru,India

5. University of Malaya,Faculty of Business and Economics,Department of management,Malaysia

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10051170/10051173/10051607.pdf?arnumber=10051607

Reference19 articles.

1. Complementary Resistive Switch-Based Arithmetic Logic Implementations Using Material Implication

2. A low power hardware implementation of S-Box for Advanced Encryption Standard

3. Reduction of power consumption by using demultiplexer circuitry in ALU designing

4. A novel design method of a simple ALU based on PROTEUS

5. An implementation of 1-bit low power full adder based on multiplexer and pass transistor logic

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