Chip-level Thermal Simulation for a Multicore Processor Using a Multi-Block Model Enabled by Proper Orthogonal Decomposition
Author:
Affiliation:
1. Clarkson University,Department of Electrical & Computer Engineering,Potsdam,NY,USA,13699
Funder
National Science Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9899435/9899496/09899503.pdf?arnumber=9899503
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5. A Survey of Chip-level Thermal Simulators
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