A Cascaded Gate Driver Architecture to Increase the Switching Speed of Power Devices in Series Connection-Reference-Cited by-同舟云学术

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A Cascaded Gate Driver Architecture to Increase the Switching Speed of Power Devices in Series Connection

Published:2021-04 Issue:2 Volume:9 Page:2285-2294
ISSN:2168-6777
Container-title:IEEE Journal of Emerging and Selected Topics in Power Electronics
language:
Short-container-title:IEEE J. Emerg. Sel. Topics Power Electron.

Author:

Alves Luciano F. S.^ORCID,Nguyen Van-Sang^ORCID,Lefranc Pierre^ORCID,Crebier Jean-Christophe,Jeannin Pierre Olivier^ORCID,Sarrazin Benoit

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Energy Engineering and Power Technology

Link

http://xplorestaging.ieee.org/ielx7/6245517/9378756/09131760.pdf?arnumber=9131760

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Novel Dual ISOI Combined Converter System and Its Hybrid IVS Control Strategy;2023 IEEE 2nd International Power Electronics and Application Symposium (PEAS);2023-11-10

2. Cascaded SiC JFET Topology for High-Voltage Solid-State Circuit Breaker Applications;IEEE Transactions on Industry Applications;2023-03

3. Light-Triggered Solid-State Circuit Breaker for DC Electrical Systems;Power Systems;2023

4. An enhanced single gate driven voltage‐balanced SiC MOSFET stack topology suitable for high‐voltage low‐power applications;IET Power Electronics;2021-12-16

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