Input Impedance Modeling and Experimental Validation of a Single-Phase PFC in the D-Q Frame
Author:
Affiliation:
1. Virginia Tech, Blacksburg, VA, USA
2. Google LLC., Mountain View, CA, USA
Funder
Google LLC
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Energy Engineering and Power Technology
Link
http://xplorestaging.ieee.org/ielx7/6245517/9970255/09815061.pdf?arnumber=9815061
Reference39 articles.
1. Design and implementation of three-phase AC impedance measurement unit (IMU) with series and shunt injection
2. An algorithm and implementation system for measuring impedance in the D-Q domain
3. Unity-Power-Factor Control Based on Precise Ripple Cancellation for Fast-Response PFC Preregulator
4. Modified VIENNA Rectifier III to Achieve ZVS in All Transitions: Analysis, Design, and Validation
5. Design Methodology for Three-Phase Buck-Type and Boost-Type Rectifiers to Comply With the DO-160G Current Distortion Test
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Generalized Envelope-Based Modeling of Single-Phase Grid-Connected Power Converters;IEEE Transactions on Industrial Electronics;2024-11
2. A Novel Loop Gain Model of a Single-Phase PFC Based on the D-Q Frame Concept;IEEE Transactions on Power Electronics;2023-11
3. D-Q Impedance Modeling and Stability Analysis of a Three-Phase Four-Wire System With Single-Phase Loads;IEEE Transactions on Power Electronics;2023-09
4. Loop Gain Modeling of a Single-Phase PFC for Online Small-Signal Stability Monitoring;2023 IEEE Applied Power Electronics Conference and Exposition (APEC);2023-03-19
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