Performance Analysis of 14nm SOI-based Trigate Gaussian Channel Junctionless FinFET with Punchthrough Stop Layer-Reference-Cited by-同舟云学术

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Performance Analysis of 14nm SOI-based Trigate Gaussian Channel Junctionless FinFET with Punchthrough Stop Layer

Published:2023-08-28 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)
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Author:

Ramakrishnan Mathangi¹,Alias N. Ezaila¹,Tan M. L. Peng¹,Hamzah Afiq¹,Wahab Yasmin Abdul²,Hussin Hanim³

Affiliation:

1. Universiti Teknologi Malaysia,Faculty of Electrical Engineering,Johor Bahru,Malaysia,81310

2. Universiti Malaya,Nanotechnology & Catalysis Research Centre,Kuala Lumpur,Malaysia,50603

3. Universiti Teknologi MARA,School of Electrical Engineering, College of Engineering,Shah Alam,Malaysia,40450

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10326449/10326731/10326895.pdf?arnumber=10326895

Reference15 articles.

1. A two-dimensional model for the potential distribution and threshold voltage of short-channel double-gate metal-oxide-semiconductor field-effect transistors with a vertical Gaussian-like doping profile

2. Revisiting the doping requirement for low power junctionless MOSFETs

3. Planar junctionless transistor with non-uniform channel doping

4. Role of quantum capacitance on the random dopant fluctuation induced threshold voltage variability in junctionless InGaAs FinFETs

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