Dynamic Voltage and Frequency Scaling to Improve Energy-Efficiency of Hardware Accelerators-Reference-Cited by-同舟云学术

Dynamic Voltage and Frequency Scaling to Improve Energy-Efficiency of Hardware Accelerators

Published:2021-12 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC)
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Author:

Liu Siqin,Karanth Avinash

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9680324/9680271/09680455.pdf?arnumber=9680455

Reference28 articles.

1. SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training

2. Scalpel: Customizing dnn pruning to the underlying hardware paral-lelism;yu;2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA) ISCA,0

3. Supervised Learning Based Power Management for Multicore Processors

4. DozzNoC: Reducing Static and Dynamic Energy in NoCs with Low-latency Voltage Regulators using Machine Learning

5. Eyeriss

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1. Energy-Efficient Low-Complexity Power Management in Multi-Core RAN Systems;2024 IEEE International Conference on Communications Workshops (ICC Workshops);2024-06-09

2. Dynamic Voltage and Frequency Scaling as a Method for Reducing Energy Consumption in Ultra-Low-Power Embedded Systems;Electronics;2024-02-20

3. Performance models and energy-optimal scheduling of DNNs on many-core hardware with dynamic power management;Proceedings of the 2023 Workshop on Compilers, Deployment, and Tooling for Edge AI;2023-09-21

4. ConverGenT: Automated Topology Generation and Analysis of Hybrid DC–DC Converters;IEEE Transactions on Power Electronics;2023-09

5. PROPHET: Predictive On-Chip Power Meter in Hardware Accelerator for DNN;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09