1. Exploration of optimal functional Trojan-resistant hardware intellectual property (IP) core designs during high level synthesis;Microprocessors and Microsystems;2023-11
2. FPGA Formal Verification: A Local Logic Correctness Approach;2023 Congress in Computer Science, Computer Engineering, & Applied Computing (CSCE);2023-07-24
3. Formal Verification of Fault-Tolerant Hardware Designs;IEEE Access;2023
4. Monitoring the Effects of Static Variable Orders on the Construction of BDDs;2022 International Interdisciplinary Conference on Mathematics, Engineering and Science (MESIICON);2022-11-11
5. Polynomial Formal Verification;Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design;2022-10-30