Symbol-Level Detection With Matched Non-Binary LDPC Codes for Position Errors in Racetrack Memories
Author:
Affiliation:
1. Department of Information and Computer Technology, Faculty of Engineering, Tokyo University of Science, Tokyo, Japan
Funder
JSPS KAKENHI
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/20/10026423/09919870.pdf?arnumber=9919870
Reference28 articles.
1. Protograph-Based LDPC Coded System for Position Errors in Racetrack Memories
2. Correcting Deletions in Multiple-Heads Racetrack Memories
3. Modern Coding Theory
4. Concatenated LDPC/2-D-Marker Codes and Non-Iterative Detection/Decoding for Recovering Position Errors in Racetrack Memories
5. A survey of error-correcting codes for channels with symbol synchronization errors
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