A Low-Power, High-Speed Auto-Terminated Write Circuit Architecture With Hybrid MTJ/CMOS Circuits
Author:
Affiliation:
1. School of Electronic Engineering and Automation, Guilin University of Electronic Technology, Guilin, China
2. School of Electronic Information and Automation, Guilin University of Aerospace Technology, Guilin, China
Funder
National Natural Science Foundation of China
Guangxi Key Laboratory of Automatic Detecting Technology and Instruments
Science Foundation, Guilin University of Aerospace Technology
Research Basic Ability Improvement Project for Young and Middle-Aged Teachers of Guangxi Universities
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/20/10053565/10016668.pdf?arnumber=10016668
Reference32 articles.
1. A novel self write-terminated driver for hybrid STT-MTJ/CMOS LIM structure
2. Design and Analysis of LIM Hybrid MTJ/CMOS Logic Gates
3. Self-Terminated Write-Assist Technique for STT-RAM
4. Cost-Efficient Self-Terminated Write Driver for Spin-Transfer-Torque RAM and Logic
5. High-Performance Computing-in-Memory Architecture Using STT-/SOT-Based Series Triple-Level Cell MRAM
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