A Study on Accelerating SP Decoding by Neural Network in SMR System
Author:
Affiliation:
1. Graduate School of Science and Engineering, Ehime University, Matsuyama, Japan
2. Department of Engineering, Niigata Institute of Technology, Kashiwazaki, Japan
Funder
Advanced Storage Research Consortium
Japan Society for the Promotion of Science (JSPS) KAKENHI
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/20/10294220/10130306.pdf?arnumber=10130306
Reference10 articles.
1. Generalization of a Techinque for Binary Data Communication
2. Performance Evaluation of Neuro-ITI Canceller Using a Modified Writing Process for TDMR
3. A comparison of optimal and sub-optimal MAP decoding algorithms operating in the log domain
4. Improvement of Iterative Decoding With LLR Modulator by Neural Network Using Magnetic Transition Information in SMR System
5. A Study on Iterative Decoding With LLR Modulator by Neural Network Using Adjacent Track Information in SMR System
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1. A study on acceleration of SP decoder using reliability of recording sequence by neural network based on parity check result in SMR system;AIP Advances;2024-02-01
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